;=================
; Memory control
;=================
BWSCON  	EQU  0x48000000     ;Bus width & wait status
BANKCON0	EQU  0x48000004     ;Boot ROM control
BANKCON1	EQU  0x48000008     ;BANK1 control
BANKCON2	EQU  0x4800000c     ;BANK2 control
BANKCON3	EQU  0x48000010     ;BANK3 control
BANKCON4	EQU  0x48000014     ;BANK4 control
BANKCON5	EQU  0x48000018     ;BANK5 control
BANKCON6	EQU  0x4800001c     ;BANK6 control
BANKCON7	EQU  0x48000020     ;BANK7 control
REFRESH 	EQU  0x48000024     ;DRAM/SDRAM refresh
BANKSIZE	EQU  0x48000028     ;Flexible Bank Size
MRSRB6  	EQU  0x4800002c     ;Mode register set for SDRAM Bank6
MRSRB7  	EQU  0x48000030     ;Mode register set for SDRAM Bank7

;Memory Area
;GCS6 32bit(64MB) SDRAM(0x3000_0000-0x33ff_ffff)

;BWSCON
DW8		EQU	(0x0)
DW16		EQU	(0x1)
DW32		EQU	(0x2)
WAIT		EQU	(0x1<<2)
UBLB		EQU	(0x1<<3)

B1_BWSCON	EQU (DW32)	; Not connected
B2_BWSCON	EQU (DW16)	; Not Connected
B3_BWSCON	EQU (DW16)	; Ethernet(CS8900), 16-bit
B4_BWSCON	EQU (DW16)	; Not Connected 
B5_BWSCON	EQU (DW16)	; Not Connected 
B6_BWSCON	EQU (DW32)	; SDRAM 32MBx2, 32-bit
B7_BWSCON	EQU (DW32)	; N.C.

;BANK0CON

B0_Tacs		EQU	0x0	;0clk
B0_Tcos		EQU	0x0	;0clk
B0_Tacc		EQU	0x7	;14clk
B0_Tcoh		EQU	0x0	;0clk
B0_Tah		EQU	0x0	;0clk
B0_Tacp		EQU	0x0
B0_PMC		EQU	0x0	;normal

;BANK1CON
B1_Tacs		EQU	0x0	;0clk
B1_Tcos		EQU	0x0	;0clk
B1_Tacc		EQU	0x7	;14clk
B1_Tcoh		EQU	0x0	;0clk
B1_Tah		EQU	0x0	;0clk
B1_Tacp		EQU	0x0
B1_PMC		EQU	0x0	;normal

;Bank 2 parameter
B2_Tacs		EQU	0x0	;0clk
B2_Tcos		EQU	0x0	;0clk
B2_Tacc		EQU	0x7	;14clk
B2_Tcoh		EQU	0x0	;0clk
B2_Tah		EQU	0x0	;0clk
B2_Tacp		EQU	0x0
B2_PMC		EQU	0x0	;normal

;Bank 3 parameter
B3_Tacs		EQU	0x0	;0clk
B3_Tcos		EQU	0x0	;0clk
B3_Tacc		EQU	0x7	;14clk
B3_Tcoh		EQU	0x0	;0clk
B3_Tah		EQU	0x0	;0clk
B3_Tacp		EQU	0x0
B3_PMC		EQU	0x0	;normal

;Bank 4 parameter
B4_Tacs		EQU	0x0	;0clk
B4_Tcos		EQU	0x0	;0clk
B4_Tacc		EQU	0x7	;14clk
B4_Tcoh		EQU	0x0	;0clk
B4_Tah		EQU	0x0	;0clk
B4_Tacp		EQU	0x0
B4_PMC		EQU	0x0	;normal

;Bank 5 parameter
B5_Tacs		EQU	0x0	;0clk
B5_Tcos		EQU	0x0	;0clk
B5_Tacc		EQU	0x7	;14clk
B5_Tcoh		EQU	0x0	;0clk
B5_Tah		EQU	0x0	;0clk
B5_Tacp		EQU	0x0
B5_PMC		EQU	0x0	;normal

;Bank 6 parameter
B6_MT		EQU	0x3	;SDRAM
B6_Trcd		EQU	0x2	;4clk
B6_SCAN		EQU	0x1	;9bit

;Bank 7 parameter
B7_MT		EQU	0x3	;SDRAM
B7_Trcd		EQU	0x2	;4clk
B7_SCAN		EQU	0x1	;9bit

;REFRESH parameter
REFEN		EQU	0x1	;Refresh enable
TREFMD		EQU	0x0	;CBR(CAS before RAS)/Auto refresh
Trp		EQU	0x2	;4clk
Tsrc		EQU	0x2	;6clk

Tchr		EQU	0x2	;3clk
REFCNT		EQU	1269	;>[(2048+1-64ms/8192*50.8Mhz)]=1653

;==========================
; CLOCK & POWER MANAGEMENT
;==========================
LOCKTIME	EQU  0x4c000000     ;PLL lock time counter
MPLLCON 	EQU  0x4c000004     ;MPLL Control
UPLLCON 	EQU  0x4c000008     ;UPLL Control
CLKCON  	EQU  0x4c00000c     ;Clock generator control
CLKSLOW 	EQU  0x4c000010     ;Slow clock control
CLKDIVN 	EQU  0x4c000014     ;Clock divider control

;=================
; INTERRUPT
;=================
INTMOD   	EQU  0x4a000004    ;Interrupt mode control
INTMSK   	EQU  0x4a000008    ;Interrupt mask control
INTSUBMSK	EQU  0x4a00001c    ;Interrupt sub mask

;=================
; I/O PORT for LED
;=================
GPBCON  	EQU  0x56000010     ;Port B control
GPBDAT  	EQU  0x56000014     ;Port B data
GPBUP   	EQU  0x56000018     ;Pull-up control B

;=================
; WATCH DOG TIMER
;=================
WTCON 	EQU  0x53000000       ;Watch-dog timer mode
WTDAT 	EQU  0x53000004       ;Watch-dog timer data
WTCNT 	EQU  0x53000008       ;Eatch-dog timer count

;=================
; Nand Flash
;=================
NFCONF		EQU	0x4E000000	;NAND Flash configuration
NFCONT		EQU	0x4E000004      ;NAND Flash control
NFCMD		EQU	0x4E000008      ;NAND Flash command
NFADDR		EQU	0x4E00000C      ;NAND Flash address
NFDATA		EQU	0x4E000010      ;NAND Flash data
NFDATA8		EQU	0x4E000010      ;NAND Flash data
NFMECCD0	EQU	0x4E000014      ;NAND Flash ECC for Main Area
NFMECCD1	EQU	0x4E000018
NFSECCD		EQU	0x4E00001C	;NAND Flash ECC for Spare Area
NFSTAT		EQU	0x4E000020	;NAND Flash operation status
NFESTAT0	EQU	0x4E000024
NFESTAT1	EQU	0x4E000028
NFMECC0		EQU	0x4E00002C
NFMECC1		EQU	0x4E000030
NFSECC		EQU	0x4E000034
NFSBLK		EQU	0x4E000038	;NAND Flash Start block address
NFEBLK		EQU	0x4E00003C	;NAND Flash End block address

        END
